This invention relates to magnetic bubble memory organizations and more particularly to matrixed memory organizations.
Magnetic bubble memories have been of growing interest because of their increased storage capacity for a given area as compared to conventional memory storage systems such as those using ferrite cores. Magnetic bubble memories have been developed in which very large numbers of bit information can be stored in small areas.
A block access memory such as is found in conventional fixed head disks can be designed using magnetic bubble memory chips. However, each chip in such a memory requires four driver or control circuits and a detector circuit to operate properly. Two driver circuits are needed to access the memory for the storage and retrieval of information. Two more are needed to generate information for storage in the chip memory and process information from the memory. A detector senses the binary value of information removed from the memory and provides an electronic equivalent which can be used by conventional circuits.
One problem in designing such memories is that the number of associated control drivers and detector circuits grows quite large as more magnetic bubble chips are employed. This places design restrictions on a memory system utilizing magnetic bubble chips because of the cost, power and space requirements imposed by the large number of these circuits when any sizable number of chips are employed in a memory organization.
One method of reducing the circuits associated with the plurality of chips in a memory is to arrange the chips in an array of rows and columns as suggested by Hsu Chang, "Bubble Domain Memory Chips", IEEE Transactions on Magnetics, Sept. 1972, pp. 564-569. There, two electronic drivers are required to control the transfer functions of the chips in each column and two electronic drivers and a sense amplifier are needed for the chips in each of the rows in the matrix organization.